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oncsSubConstants.h
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1 #ifndef __SUBEVT_CONSTANTS_H
2 #define __SUBEVT_CONSTANTS_H
3 
4 /* the enum types for dump style */
5 #define EVT_DECIMAL 1
6 #define EVT_HEXADECIMAL 2
7 #define EVT_OCTAL 3
8 
9 /* Misc. values */
10 #define MAX_OUTLENGTH 80000
11 
12 // the header length value
13 #define SEVTHEADERLENGTH 4U
14 
15 
16 
17 // ---------------------------------------------------------------------
18 // IDCRAW requests the subevent to be copied without any decoding
19 #define IDCRAW 0
20 
21 // ---------------------------------------------------------------------
22 // IDDGEN uses the standard decoding method imbedded in the subevent
23 // header in the new data format
24 #define IDDGEN 1
25 
26 // ---------------------------------------------------------------------
27 // IDHCPY requests only the subevent header (or the Event header) to be
28 // copied:
29 #define IDHCPY 2
30 
31 // ---------------------------------------------------------------------
32 // the next methods < 10 use what we consider standard methods by
33 // now, i.e., no scheme proprietary to one particular hardware brand
34 
35 #define ID1STR 3
36 #define IDCSTR 4
37 #define ID2EVT 5
38 #define ID4EVT 6
39 #define ID2SUP 7
40 
41 // ---------------------------------------------------------------------
42 // the next methods are for the hammond/g-2 board.
43 
44 #define IDHAMMONDSET 31
45 #define IDHAMMOND 32
46 
47 #define IDSAM 40
48 
49 #define IDMIZNHC 41
50 
51 #define IDDCFEM 51
52 #define IDTECFEM 52
53 
54 #define IDSIS3300 55
55 #define IDCAENV792 56
56 #define IDCAENV785N 57
57 
58 #define IDFIFOBOARD 58
59 #define IDRCPETDATA 59
60 #define IDBSPETDATA 60
61 #define IDUPPETDATA 61
62 #define IDUPPETDATA_V104 62
63 #define IDSIS3300R 65
64 
65 
66 #define IDSRSV01 70
67 #define IDUPPETPARAMS 71
68 
69 #define IDDRS4V1 81
70 #define IDCAENV1742 85
71 
72 #define IDPCONTAINER 89
73 
74 #define IDFNALMWPC 90
75 #define IDFNALMWPCV2 91
76 
77 #define IDTPCFEEV1 97
78 #define IDMVTXV0 98
79 
80 #define IDTPCFEEV2 99
81 
82 #define IDVMM3V1 102
83 
84 #define IDDREAMV0 103
85 
86 #define IDMVTXV1 104
87 
88 #define IDMVTXV2 105
89 
90 // the "level 0", meaning the raw untreated FEM data
91 
92 #define IDBBC_DCM0 IDDCM0OFFSET + 1
93 #define IDMVD_DCM0 IDDCM0OFFSET + 2
94 #define IDDCH_DCM0 IDDCM0OFFSET + 3
95 #define IDPC_DCM0 IDDCM0OFFSET + 4
96 #define IDTEC_DCM0 IDDCM0OFFSET + 5
97 #define IDRICH_DCM0 IDDCM0OFFSET + 6
98 #define IDTOF_DCM0 IDDCM0OFFSET + 7
99 #define IDPBSC_DCM0 IDDCM0OFFSET + 8
100 #define IDPBGL_DCM0 IDDCM0OFFSET + 9
101 #define IDMUTA_DCM0 IDDCM0OFFSET + 10
102 #define IDMUTC_DCM0 IDDCM0OFFSET + 11
103 #define IDMUID_DCM0 IDDCM0OFFSET + 12
104 
105 // the "level 1", FEM data zero-suppressed by the FPGA
106 
107 #define IDBBC_DCM1 IDDCM1OFFSET + 1
108 #define IDMVD_DCM1 IDDCM1OFFSET + 2
109 #define IDDCH_DCM1 IDDCM1OFFSET + 3
110 #define IDPC_DCM1 IDDCM1OFFSET + 4
111 #define IDTEC_DCM1 IDDCM1OFFSET + 5
112 #define IDRICH_DCM1 IDDCM1OFFSET + 6
113 #define IDTOF_DCM1 IDDCM1OFFSET + 7
114 #define IDPBSC_DCM1 IDDCM1OFFSET + 8
115 #define IDPBGL_DCM1 IDDCM1OFFSET + 9
116 #define IDMUTA_DCM1 IDDCM1OFFSET + 10
117 #define IDMUTC_DCM1 IDDCM1OFFSET + 11
118 #define IDMUID_DCM1 IDDCM1OFFSET + 12
119 
120 // the "level 2", data further compressed by the DSP
121 
122 #define IDBBC_DCM2 IDDCM2OFFSET + 1
123 #define IDMVD_DCM2 IDDCM2OFFSET + 2
124 #define IDDCH_DCM2 IDDCM2OFFSET + 3
125 #define IDPC_DCM2 IDDCM2OFFSET + 4
126 #define IDTEC_DCM2 IDDCM2OFFSET + 5
127 #define IDRICH_DCM2 IDDCM2OFFSET + 6
128 #define IDTOF_DCM2 IDDCM2OFFSET + 7
129 #define IDPBSC_DCM2 IDDCM2OFFSET + 8
130 #define IDPBGL_DCM2 IDDCM2OFFSET + 9
131 #define IDMUTA_DCM2 IDDCM2OFFSET + 10
132 #define IDMUTC_DCM2 IDDCM2OFFSET + 11
133 #define IDMUID_DCM2 IDDCM2OFFSET + 12
134 
135 
136 
137 #endif